Date of Award

1981

Document Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical Engineering and Computer Science

Abstract

Today, gate logic simulation requires large computer facilities. This thesis demonstrates the ability to implement a gate logic simulator in a limited memory environment, specifically in a microcomputer system which usually has limited memory space; at the same time with a reasonable response time. This will permit the use of gate level simulation as a powerful design tool implemented with limited resources or with a desk-top microcomputer. The thesis discusses the development of the MICROFIT logic simulator. The MICROFIT would be used by the students and implemented on the LSI-11 Microcomputer Systems in the Assembly Language Laboratory at Florida Institute of Technology. The simulator is written in PDP-11 assembly language, using the LSI-11 Microcomputer. MICROFIT is highly interactive and provides its own sufficient syntax checking. This leads to an easy conversational user language, especially for circuit description and input signals. MICROFIT provides user control of the simulation process by providing many output options ranging from single stepping to writing out all the tables. It is a table-driven, eventdirected simulator. It serves as an excellent educational and practical tool for simulating combinational and sequential logic circuits.

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